000			01126cam a22003377a 4500
001			16329312
003			BD-DhUL
005			20140725144919.0
008			140724s2010 ne a b 001 0 eng d
010			_a 2010932404
016	7		_a015668000 _2Uk
020			_a9789048195787 (alk. paper)
020			_a9048195780 (alk. paper)
035			_a(OCoLC)ocn646114030
040			_aBTCTA _beng _cBTCTA _dYDXCP _dJHE _dUKMGB _dDLC _dBD-DhUL
042			_alccopycat
050	0	0	_aQA76.9.L63 _bW55 2010
082	0	0	_a005.1015113 _223 _bWIT
100	1		_aWille, Robert.
245	1	0	_aTowards a design flow for reversible logic / _cRobert Wille, Rolf Drechsler.
260			_aDordrecht ; _aNew York : _bSpringer Verlag, _cc2010.
300			_axiii, 184 p. : _bill. ; _c24 cm.
504			_aIncludes bibliographical references and index.
650		0	_aComputer logic.
650		0	_aComputer architecture.
650		0	_aLogic programming.
700	1		_aDrechsler, Rolf.
906			_a7 _bcbc _ccopycat _d2 _encip _f20 _gy-gencatlg
942			_2ddc _cBK
955			_apc17 2010-07-13 _bxh14 2011-10-13 z-processor _ixh14 2011-10-17 to Dewey
999			_c741 _d741