000			01699cam a22003494a 4500
001			14107547
003			BD-DhUL
005			20140725142033.0
008			140724s2006 maua b 001 0 eng
010			_a 2005026625
020			_a1584508558 (alk. paper)
035			_a(OCoLC)ocm61724336
040			_aDLC _cDLC _dYDX _dBAKER _dDLC _dBD-DhUL
042			_apcc
050	0	0	_aTK7885.7 _b.B68 2006
082	0	0	_a005.13 _222 _bBOH
100	1		_aBotros, Nazeih, _d1945-
245	1	0	_aHDL programming fundamentals : _bVHDL and Verilog / _cNazeih Botros.
250			_a1st ed.
260			_aHingham, Mass. : _bDa Vinci Engineering Press, _cc2006.
300			_axiv, 506 p. : _bill. ; _c25 cm. + _e1 CD-ROM (4 3/4 in.)
365			_aIRS _b399
504			_aIncludes bibliographical references and index.
505	0		_aIntroduction -- Data-flow description -- Behavioral descriptions -- Structural description -- Switch-level descriptions -- Procedures, tasks, and functions -- Mixed-type description -- Advanced HDL descriptions -- Mixed-language descriptions -- Synthesis basics -- Creating a project in Xilinx 7.1 using VHDL or Verilog -- Summary of HDL commands -- About the CD-ROM.
538			_aSystem requirements: Windows NT, 2000, or XP; VHDL and Verilog simulator package.
650		0	_aVHDL (Computer hardware description language)
650		0	_aVerilog (Computer hardware description language)
856	4	1	_3Table of contents _uhttp://www.loc.gov/catdir/toc/ecip0519/2005026625.html
906			_a7 _bcbc _corignew _d1 _eecip _f20 _gy-gencatlg
942			_2ddc _cBK
955			_ajf17 2005-09-14 _ijf17 2005-09-14; _aaa07 2005-09-26 _aps04 2006-04-24 1 copy rec'd., to CIP ver. _ajf00 2006-05-03
999			_c724 _d724