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008 111114s2011 njua 001 0 eng
010 _a 2011499661
020 _a9780470633229
020 _a0470633220
035 _a(OCoLC)ocn690335726
040 _aAU@
_beng
_cAU@
_dNUI
_dYDXCP
_dUW1
_dCDX
_dDLC
_dBD-DhUL
042 _alccopycat
050 0 0 _aTK454
_b.I78 2011
082 0 4 _a621.3192
_222
_bIRE
100 1 _aIrwin, J. David,
_d1939-
245 1 0 _aEngineering circuit analysis /
_cJ. David Irwin, R. Mark Nelms.
250 _a10th ed.
260 _aHoboken, N.J. :
_bJohn Wiley & Sons,
_cc2011.
300 _axxi, 839 p. :
_bill. (chiefly col.) ;
_c29 cm.
500 _aIncludes index.
650 0 _aElectric circuit analysis
_vTextbooks.
650 0 _aElectronics
_vTextbooks.
700 1 _aNelms, R. M.
856 4 2 _3Publisher description
_uhttp://www.loc.gov/catdir/enhancements/fy1203/2011499661-d.html
856 4 1 _3Table of contents only
_uhttp://www.loc.gov/catdir/enhancements/fy1203/2011499661-t.html
906 _a7
_bcbc
_ccopycat
_d2
_encip
_f20
_gy-gencatlg
942 _2ddc
_cBK
955 _bxh58 2011-11-14 z-processor
_ixh92 2011-11-15 to BCCD
999 _c32908
_d32908