000			03082cam a22003734a 4500
001			16580164
003			BD-DhUL
005			20150115143405.0
008			101215s2011 enka b 001 0 eng
010			_a 2010048032
020			_a9780470685716 (hardback)
020			_a0470685719 (hardback)
035			_a(OCoLC)ocn682892492
040			_aDLC _cDLC _dYDX _dBTCTA _dYDXCP _dDLC _dBD-DhUL
042			_apcc
050	0	0	_aTK7871.85 _b.V6525 2011
082	0	0	_a621.38162 _bVOE
084			_aTEC008010 _2bisacsh
100	1		_aVoldman, Steven H.
245	1	0	_aESD : _bdesign and synthesis / _cSteven H. Voldman.
260			_aChichester, West Sussex, U.K. : _bWiley, _cc2011.
300			_axiii, 270 p. : _bill. ; _c25 cm.
365			_aUS$ _b99.00
504			_aIncludes bibliographical references and index.
520			_a"The book focuses on both fundamentals of ESD design to construct and integrate a semiconductor chip. It enables ESD engineers to build better products by exploring six key areas- 1) ESD design synthesis 2) I/O design and integration 3) semiconductor chip architecture 4) floor planning 5) power bus design and 6) ESD power clamps. The book is well organised and uses a top down approach, starting by looking at the basics. It takes a look at design synthesis, floor planning and ESD design issues. The book analyses the synthesis of device elements, also the synthesis of ESD circuits and functional circuits. In Chapter 5, the synthesis of ESD power clamps is described, followed by coverage on synthesis of power rails with I/O, ESD and pads in Chapter 6. The integration of special function circuits and special issues is helpfully included in the book before more broad ESD design methodioligies are outlined. The important areas of design rule checking, along with design verification methods, are looked at towards the end of the book, and the last chapter provides the reader with knowledge about useful design tools. In many ways this text is unique. There is currently no other book on the market that addresses ESD design synthesis and its relationaship to the characterisation of test structures and technologies. Focuses on practical design techniques, providing good design practices and rules contains essential information on chip floor-planning and architecture that has not been published in a single book before covers up-to-date technology benchmarking and characterisation uses state-of-the-art examples with detailed discussion includes end-of-chapter design and integration problems"-- _cProvided by publisher.
520			_a"The book focuses on both fundamentals of ESD design to construct and integrate a semiconductor chip"-- _cProvided by publisher.
650		0	_aSemiconductors _xProtection.
650		0	_aIntegrated circuits _xProtection.
650		0	_aElectrostatics.
650		0	_aAnalog electronic systems _xDesign and construction.
906			_a7 _bcbc _corignew _d1 _eecip _f20 _gy-gencatlg
942			_2ddc _cBK
955			_bxh00 2010-12-15 _ixh07 2010-12-16 ONIX to Dewey _axe07 2011-06-07 1 copy rec'd., to CIP ver.
999			_c31649 _d31649