| 000 | 01011cam a2200265 a 4500 | ||
|---|---|---|---|
| 001 | 3449439 | ||
| 003 | BD-DhUL | ||
| 005 | 20150114151749.0 | ||
| 008 | 920422s1992 ne a b 000 0 eng | ||
| 010 | _a 92016266 | ||
| 020 | _a0792392531 (alk. paper) | ||
| 040 |
_aDLC _cDLC _dDLC _dBD-DhUL |
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| 050 | 0 | 0 |
_aTK7885.7 _b.V48 1992 |
| 082 | 0 | 0 |
_a621.392 _220 _bVHD |
| 245 | 0 | 0 |
_aVHDL for simulation, synthesis, and formal proofs of hardware / _cedited by Jean Mermet. |
| 260 |
_aDordrecht ; _aBoston : _bKluwer Academic, _cc1992. |
||
| 300 |
_aix, 307 p. : _bill. ; _c25 cm. |
||
| 440 | 4 |
_aThe Kluwer international series in engineering and computer science ; _vSECS 183 |
|
| 504 | _aIncludes bibliographical references. | ||
| 650 | 0 | _aVHDL (Computer hardware description language) | |
| 700 | 1 | _aMermet, Jean P. | |
| 906 |
_a7 _bcbc _corignew _d1 _eocip _f19 _gy-gencatlg |
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| 942 |
_2ddc _cBK |
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| 955 | _apc03 to be00 04-22-92; be11 to SCD 04-23-92; fg11 04-23-92; fm27 04-29-92; CIP ver. jd28 to SL 07-21-92 | ||
| 999 |
_c30976 _d30976 |
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