| 000 | 01382cam a22003374a 4500 | ||
|---|---|---|---|
| 001 | 12544583 | ||
| 003 | BD-DhUL | ||
| 005 | 20150114143156.0 | ||
| 008 | 010925s2002 maua b 001 0 eng | ||
| 010 | _a 2001050362 | ||
| 020 | _a0792376064 (alk. paper) | ||
| 040 |
_aDLC _cDLC _dDLC |
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| 042 | _apcc | ||
| 050 | 0 | 0 |
_aTK7868.L6 _bL586 2002 |
| 082 | 0 | 0 |
_a621.395 _221 _bLOG |
| 245 | 0 | 0 |
_aLogic synthesis and verification / _ceditors, Soha Hassoun, Tsutomu Sasao. |
| 260 |
_aBoston : _bKluwer Academic Publishers, _cc2002. |
||
| 300 |
_axiv, 454 p. : _bill. ; _c24 cm. |
||
| 365 |
_aUS$ _b269.00 |
||
| 440 | 4 |
_aThe Kluwer international series in engineering and computer science ; _vSECS 654 |
|
| 504 | _aIncludes bibliographical references and index. | ||
| 650 | 0 |
_aLogic circuits _xComputer-aided design. |
|
| 650 | 0 |
_aLogic design _xData processing. |
|
| 700 | 1 | _aHassoun, Soha. | |
| 700 | 1 |
_aSasao, Tsutomu, _d1950- |
|
| 856 | 4 | 2 |
_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy0820/2001050362-d.html |
| 856 | 4 | 1 |
_3Table of contents only _uhttp://www.loc.gov/catdir/enhancements/fy0820/2001050362-t.html |
| 906 |
_a7 _bcbc _corignew _d1 _eocip _f20 _gy-gencatlg |
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| 942 |
_2ddc _cBK |
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| 955 |
_apc25 2001-09-25 to ASCD; _cjg11 2001-09-26 _aaa07 2001-09-28 _aps15 2001-12-28 bk rec'd, to CIP ver. _ajg00 2002-01-07 _ajg01 2002-06-03 Copy 2 added, to BCCD |
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| 999 |
_c30912 _d30912 |
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