000 05269cam a2200865Ia 4500
001 ocn779165215
003 OCoLC
005 20171115100337.0
006 m o d
007 cr cnu---unuuu
008 120305s2012 njua o 001 0 eng d
010 _z 2011043303
020 _a9781118273142
_q(electronic bk.)
020 _a1118273141
_q(electronic bk.)
020 _a9781118273111
_q(electronic bk.)
020 _a1118273117
_q(electronic bk.)
020 _a9781118273135
_q(electronic bk.)
020 _a1118273133
_q(electronic bk.)
020 _z9781118243046
020 _z1118243048
024 8 _a9786613621894
028 0 1 _aEB00063227
_bRecorded Books
029 1 _aAU@
_b000049014129
029 1 _aAU@
_b000050060742
029 1 _aDEBBG
_bBV040901275
029 1 _aDEBSZ
_b372901107
029 1 _aDEBSZ
_b378285343
029 1 _aDEBSZ
_b381373126
029 1 _aDEBSZ
_b431087660
029 1 _aDEBSZ
_b449282325
029 1 _aDKDLA
_b820120-katalog:000600752
029 1 _aGBVCP
_b785364056
029 1 _aNZ1
_b14832585
029 1 _aNZ1
_b15340265
035 _a(OCoLC)779165215
_z(OCoLC)784124227
_z(OCoLC)787845563
_z(OCoLC)810072366
_z(OCoLC)864910039
_z(OCoLC)961487731
_z(OCoLC)962623524
037 _a10.1002/9781118273142
_bWiley InterScience
_nhttp://www3.interscience.wiley.com
040 _aN$T
_beng
_epn
_cN$T
_dUIU
_dDG1
_dE7B
_dEBLCP
_dYDXCP
_dCDX
_dCOO
_dMYG
_dUMI
_dOCLCQ
_dDEBSZ
_dOCLCQ
_dB24X7
_dOCLCA
_dOCLCQ
_dRECBK
_dOCLCF
_dOCLCQ
_dOCL
_dOCLCQ
_dAZK
049 _aMAIN
050 4 _aTK7874.65
_b.D66 2012eb
072 7 _aTEC
_x008010
_2bisacsh
072 7 _aTEC
_x008020
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aDoman, David.
245 1 0 _aEngineering the CMOS library : enhancing digital design kits for competitive silicon /
_cDavid Doman.
_h[electronic resource]
260 _aHoboken, N.J. :
_bJohn Wiley & Sons,
_c©2012.
300 _a1 online resource (iv, 327 pages) :
_billustrations
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _adata file
_2rda
505 0 _aFrontmatter -- Introduction -- Stdcell Libraries -- IO Libraries -- Memory Compilers -- Other Functions -- Physical Views -- Spice -- Timing Views -- Power Views -- Noise Views -- Logical Views -- Test Views -- Consistency -- Design for Manufacturability -- Validation -- Playing with the Physical Design Kit: Usually ₃At Your Own Risk₄ -- Tagging and Revisioning -- Releasing and Supporting -- Other Topics -- Communications -- Appendix I: Minimum Library Synthesis Versus Full-Library Synthesis of A Four-Bit Flash Adder -- Appendix II: Pertinent CMOS Bsim Spice Parameters with Units and Default Levels -- Appendix III: Definition of Terms -- Appendix IV: One Possible Means of Formalized Monthly Reporting -- Index.
520 _a"This book is about gaining a competitive edge in the Integrated Circuit IC marketplace. It suggests that there is an unrecognized value hidden in the safety margins of descriptive views in any piece of intellectual property (IP). This hidden value is normally left on the table. However, it can be used by the aggressive design engineer (or manager) to surpass the competition in the marketplace. This text reveals how the typical design house can enhance performance, reduce power, and improve the density of standard-cell logic. It will show how to add value to the generic, foundry-provided standard-cell library that most companies use without modification. Lastly, it identifies the low-risk opportunities aggressive designers and managers can employ to improve margin from overdesigned standard cells."--
_cProvided by publisher.
520 _a"This book is about gaining a competitive edge in the Integrated Circuit IC marketplace"--
_cProvided by publisher.
588 0 _aPrint version record.
650 0 _aDigital integrated circuits
_xDesign and construction.
650 0 _aMetal oxide semiconductors, Complementary.
650 0 _aIndustrial efficiency.
650 4 _aDigital integrated circuits
_xDesign and construction.
650 4 _aMetal oxide semiconductors, Complementary.
650 4 _aIndustrial efficiency.
650 7 _aTECHNOLOGY & ENGINEERING
_xElectronics
_xCircuits
_xVLSI & ULSI.
_2bisacsh
650 7 _aTECHNOLOGY & ENGINEERING
_xElectronics
_xCircuits
_xGeneral.
_2bisacsh
650 7 _aTECHNOLOGY & ENGINEERING
_xElectronics
_xCircuits
_xIntegrated.
_2bisacsh
650 7 _aDigital integrated circuits
_xDesign and construction.
_2fast
_0(OCoLC)fst00893696
650 7 _aIndustrial efficiency.
_2fast
_0(OCoLC)fst00970970
650 7 _aMetal oxide semiconductors, Complementary.
_2fast
_0(OCoLC)fst01017635
650 7 _aDigital integrated circuits / Design and construction.
_2local
650 7 _aMetal oxide semiconductors, Complementary.
_2local
650 7 _aIndustrial efficiency.
_2local
655 4 _aElectronic books.
710 2 _aWiley InterScience (Online service)
776 0 8 _iPrint version:
_aDoman, David.
_tEngineering the CMOS library.
_dHoboken, N.J. : John Wiley & Sons, ©2012
_z9781118243046
_w(DLC) 2011043303
_w(OCoLC)755700209
856 4 0 _uhttp://onlinelibrary.wiley.com/book/10.1002/9781118273142
_zWiley Online Library
942 _2ddc
_cBK
999 _c205666
_d205666