| 000 | 05483cam a2200793Ia 4500 | ||
|---|---|---|---|
| 001 | ocn757486963 | ||
| 003 | OCoLC | ||
| 005 | 20171116100539.0 | ||
| 006 | m o d | ||
| 007 | cr cnu---unuuu | ||
| 008 | 111018s2011 njua ob 001 0 eng d | ||
| 010 | _a 2011022710 | ||
| 020 |
_a9781118146507 _q(electronic bk.) |
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| 020 |
_a1118146506 _q(electronic bk.) |
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| 020 |
_a9781118146538 _q(electronic bk.) |
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| 020 |
_a1118146530 _q(electronic bk.) |
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| 020 | _a1283282887 | ||
| 020 | _a9781283282888 | ||
| 020 |
_z9781118008881 _q(hbk.) |
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| 020 |
_z111800888X _q(hbk.) |
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| 024 | 8 | _a9786613282880 | |
| 029 | 1 |
_aDEBBG _bBV041905967 |
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_aDEBSZ _b372706355 |
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| 029 | 1 |
_aDEBSZ _b43106735X |
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_aDKDLA _b820120-katalog:000599645 |
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_aNZ1 _b14166180 |
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_aNZ1 _b15341472 |
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| 029 | 1 |
_aDEBBG _bBV043393571 |
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| 035 |
_a(OCoLC)757486963 _z(OCoLC)760411076 _z(OCoLC)816865359 _z(OCoLC)961625833 _z(OCoLC)962695105 |
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| 040 |
_aDG1 _beng _epn _cDG1 _dYDXCP _dCDX _dCOO _dN$T _dE7B _dOCLCO _dOCLCQ _dDEBSZ _dEBLCP _dOCLCQ _dOCLCA _dOCLCQ _dOCLCF _dIDEBK _dDEBBG _dOCLCQ _dAZK |
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| 049 | _aMAIN | ||
| 050 | 4 |
_aTK7895.E42 _bC48 2011eb |
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| 072 | 7 |
_aCOM _x059000 _2bisacsh |
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| 072 | 7 |
_aCOM _x067000 _2bisacsh |
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| 072 | 7 |
_aCOM _x037000 _2bisacsh |
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| 072 | 7 |
_aTJFD _2bicssc |
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| 082 | 0 | 4 |
_a621.39/2 _223 |
| 084 |
_aTEC008010 _2bisacsh |
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| 100 | 1 |
_aChu, Pong P., _d1959- |
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| 245 | 1 | 0 |
_aEmbedded SOPC design with NIOS II processor and VHDL examples / _cPong P. Chu. _h[electronic resource] |
| 260 |
_aHoboken, N.J. : _bWiley, _c©2011. |
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| 300 |
_a1 online resource (xxxi, 703 pages) : _billustrations |
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| 336 |
_atext _btxt _2rdacontent |
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| 337 |
_acomputer _bc _2rdamedia |
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| 338 |
_aonline resource _bcr _2rdacarrier |
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| 347 |
_adata file _2rda |
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| 380 | _aBibliography | ||
| 504 | _aIncludes bibliographical references and index. | ||
| 505 | 0 | _aFront Matter -- Overview of Embedded System -- Basic Digital Circuits Development. Gate-Level Combinational Circuit -- Overview of FPGA and EDA Software -- RT-Level Combinational Circuit -- Regular Sequential Circuit -- FSM -- FSMD -- Basic Nios II Software Development. Nios II Processor Overview -- Nios II System Derivation and Low-Level Access -- Predesigned Nios II I/O Peripherals -- Predesigned Nios II I/O Drivers and HAL API -- Interrupt and ISR -- Custom I/O Peripheral Development. Custom I/O Peripheral with PIO Cores -- Avalon Interconnect and SOPC Component -- SRAM and SDRAM Controllers -- PS2 Keyboard and Mouse -- VGA Controller -- Audio Codec Controller -- SD Card Controller -- Hardware Accelerator Case Studies. GCD Accelerator -- Mandelbrot Set Fractal Accelerator -- Direct Digital Frequency Synthesis -- References -- Index. | |
| 520 |
_a"The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology.The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at http://www.altera.com/university). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a "turn-key" solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration"-- _cProvided by publisher. |
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| 588 | 0 | _aPrint version record. | |
| 650 | 0 | _aSystems on a chip. | |
| 650 | 0 | _aField programmable gate arrays. | |
| 650 | 0 |
_aComputer input-output equipment _xDesign and construction. |
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| 650 | 0 | _aVHDL (Computer hardware description language) | |
| 650 | 7 |
_aTECHNOLOGY & ENGINEERING _xElectronics _xCircuits _xGeneral. _2bisacsh |
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| 650 | 7 |
_aCOMPUTERS _xComputer Engineering. _2bisacsh |
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| 650 | 7 |
_aCOMPUTERS _xHardware _xGeneral. _2bisacsh |
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| 650 | 7 |
_aCOMPUTERS _xMachine Theory. _2bisacsh |
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| 650 | 7 |
_aComputer input-output equipment _xDesign and construction. _2fast _0(OCoLC)fst00872207 |
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| 650 | 7 |
_aField programmable gate arrays. _2fast _0(OCoLC)fst00923910 |
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| 650 | 7 |
_aSystems on a chip. _2fast _0(OCoLC)fst01141473 |
|
| 650 | 7 |
_aVHDL (Computer hardware description language) _2fast _0(OCoLC)fst01163476 |
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| 655 | 4 | _aElectronic books. | |
| 710 | 2 | _aWiley InterScience (Online service) | |
| 776 | 0 | 8 |
_iPrint version: _aChu, Pong P., 1959- _tEmbedded SOPC design with NIOS II processor and VHDL examples. _dHoboken, N.J. : Wiley, ©2011 _z9781118008881 _w(DLC) 2011022710 _w(OCoLC)682892489 |
| 856 | 4 | 0 |
_uhttp://onlinelibrary.wiley.com/book/10.1002/9781118146538 _zWiley Online Library |
| 942 |
_2ddc _cBK |
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| 999 |
_c205296 _d205296 |
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