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  <titleInfo>
    <title>Design and test technology for dependable systems-on-chip</title>
  </titleInfo>
  <name type="personal">
    <namePart>Ubar, Raimund</namePart>
    <namePart type="date">1941-</namePart>
  </name>
  <name type="personal">
    <namePart>Raik, Jaan</namePart>
    <namePart type="date">1972-</namePart>
  </name>
  <name type="personal">
    <namePart>Vierhaus, Heinrich Theodor</namePart>
    <namePart type="date">1951-</namePart>
  </name>
  <typeOfResource>text</typeOfResource>
  <genre authority="marc">bibliography</genre>
  <originInfo>
    <place>
      <placeTerm type="code" authority="marccountry">pau</placeTerm>
    </place>
    <place>
      <placeTerm type="text">Hershey, PA</placeTerm>
    </place>
    <publisher>Information Science Reference</publisher>
    <dateIssued>c2010</dateIssued>
    <dateIssued encoding="marc">2010</dateIssued>
    <issuance>monographic</issuance>
  </originInfo>
  <language>
    <languageTerm authority="iso639-2b" type="code">eng</languageTerm>
  </language>
  <physicalDescription>
    <form authority="marcform">print</form>
    <extent>xxv, 550 p. : ill. ; 29 cm.</extent>
  </physicalDescription>
  <abstract>"This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--</abstract>
  <note type="statement of responsibility">Raimund Ubar, Jaan Raik, and Heinrich Theodor Vierhaus, editors.</note>
  <note>Includes bibliographical references (p. 494-533) and index.</note>
  <subject authority="lcsh">
    <topic>Systems on a chip</topic>
    <topic>Design and construction</topic>
  </subject>
  <subject authority="lcsh">
    <topic>Networks on a chip</topic>
    <topic>Design and construction</topic>
  </subject>
  <subject authority="lcsh">
    <topic>Systems on a chip</topic>
    <topic>Testing</topic>
  </subject>
  <subject authority="lcsh">
    <topic>Networks on a chip</topic>
    <topic>Testing</topic>
  </subject>
  <classification authority="lcc">TK7895.E42 D467 2010</classification>
  <classification authority="ddc" edition="22">621.3815 UBD</classification>
  <identifier type="isbn">9781609602123 (hardcover)</identifier>
  <identifier type="isbn">9781609602147 (ebook)</identifier>
  <identifier type="lccn">2010045850</identifier>
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    <recordCreationDate encoding="marc">101201</recordCreationDate>
    <recordChangeDate encoding="iso8601">20150115155052.0</recordChangeDate>
    <recordIdentifier source="BD-DhUL">16558862</recordIdentifier>
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