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  <titleInfo>
    <title>VHDL for simulation, synthesis, and formal proofs of hardware</title>
  </titleInfo>
  <name type="personal">
    <namePart>Mermet, Jean P.</namePart>
  </name>
  <typeOfResource>text</typeOfResource>
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  <originInfo>
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    <place>
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    </place>
    <publisher>Kluwer Academic</publisher>
    <dateIssued>c1992</dateIssued>
    <dateIssued encoding="marc">1992</dateIssued>
    <issuance>monographic</issuance>
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    <languageTerm authority="iso639-2b" type="code">eng</languageTerm>
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  <physicalDescription>
    <form authority="marcform">print</form>
    <extent>ix, 307 p. : ill. ; 25 cm.</extent>
  </physicalDescription>
  <note type="statement of responsibility">edited by Jean Mermet.</note>
  <note>Includes bibliographical references.</note>
  <subject authority="lcsh">
    <topic>VHDL (Computer hardware description language)</topic>
  </subject>
  <classification authority="lcc">TK7885.7 .V48 1992</classification>
  <classification authority="ddc" edition="20">621.392 VHD</classification>
  <relatedItem type="series">
    <titleInfo>
      <title>The Kluwer international series in engineering and computer science ; SECS 183</title>
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  <identifier type="isbn">0792392531 (alk. paper)</identifier>
  <identifier type="lccn">92016266</identifier>
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