<?xml version="1.0" encoding="UTF-8"?>
<metadata
  xmlns="http://example.org/myapp/"
  xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
  xsi:schemaLocation="http://example.org/myapp/ http://example.org/myapp/schema.xsd"
  xmlns:dc="http://purl.org/dc/elements/1.1/"
  xmlns:dcterms="http://purl.org/dc/terms/"><dc:Title>Logic synthesis and verification / editors, Soha Hassoun, Tsutomu Sasao.</dc:Title>
<dc:Creator>Hassoun, Soha.</dc:Creator>
<dc:Creator>Sasao, Tsutomu, 1950-</dc:Creator>
<dc:Subject>Logic circuits Computer-aided design.</dc:Subject>
<dc:Subject>Logic design Data processing.</dc:Subject>
<dc:Subject>TK7868.L6 L586 2002</dc:Subject>
<dc:Subject>621.395 21 LOG</dc:Subject>
<dc:Description>Includes bibliographical references and index.</dc:Description>
<dc:Publisher>Boston : Kluwer Academic Publishers,</dc:Publisher>
<dc:Date>c2002.</dc:Date>
<dc:Date>c2002.</dc:Date>
<dc:Date>2002</dc:Date>
<dc:Type>Text</dc:Type>
<dc:Format>xiv, 454 p. :</dc:Format>
<dc:Identifier>http://www.loc.gov/catdir/enhancements/fy0820/2001050362-d.html</dc:Identifier>
<dc:Identifier>http://www.loc.gov/catdir/enhancements/fy0820/2001050362-t.html</dc:Identifier>
<dc:Language>eng</dc:Language>
<dc:Relation>The Kluwer international series in engineering and computer science ; SECS 654</dc:Relation>

</metadata>