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  xmlns:dcterms="http://purl.org/dc/terms/"><dc:Title>Engineering the CMOS library : enhancing digital design kits for competitive silicon / David Doman. [electronic resource]</dc:Title>
<dc:Creator>Doman, David.</dc:Creator>
<dc:Creator>Wiley InterScience (Online service)</dc:Creator>
<dc:Subject>Digital integrated circuits Design and construction.</dc:Subject>
<dc:Subject>Metal oxide semiconductors, Complementary.</dc:Subject>
<dc:Subject>Industrial efficiency.</dc:Subject>
<dc:Subject>TK7874.65 .D66 2012eb</dc:Subject>
<dc:Subject>621.3815 23</dc:Subject>
<dc:Description>Print version record.</dc:Description>
<dc:Description>"This book is about gaining a competitive edge in the Integrated Circuit IC marketplace. It suggests that there is an unrecognized value hidden in the safety margins of descriptive views in any piece of intellectual property (IP). This hidden value is normally left on the table. However, it can be used by the aggressive design engineer (or manager) to surpass the competition in the marketplace. This text reveals how the typical design house can enhance performance, reduce power, and improve the density of standard-cell logic. It will show how to add value to the generic, foundry-provided standard-cell library that most companies use without modification. Lastly, it identifies the low-risk opportunities aggressive designers and managers can employ to improve margin from overdesigned standard cells."-- Provided by publisher.</dc:Description>
<dc:Description>"This book is about gaining a competitive edge in the Integrated Circuit IC marketplace"-- Provided by publisher.</dc:Description>
<dc:Publisher>Hoboken, N.J. : John Wiley & Sons,</dc:Publisher>
<dc:Date>©2012.</dc:Date>
<dc:Date>©2012.</dc:Date>
<dc:Date>2012</dc:Date>
<dc:Type>Text</dc:Type>
<dc:Format>1 online resource (iv, 327 pages) :</dc:Format>
<dc:Identifier>http://onlinelibrary.wiley.com/book/10.1002/9781118273142</dc:Identifier>
<dc:Language>eng</dc:Language>
<dc:Relation>Engineering the CMOS library.</dc:Relation>
<dc:Relation>Engineering the CMOS library.</dc:Relation>

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