Embedded SoPC design with NIOS II processor and Verilog examples / Pong P. Chu. [electronic resource] Chu, Pong P., 1959- Embedded computer systems. Field programmable gate arrays. Verilog (Computer hardware description language) TK7895.E42 006.2/2 23 Includes bibliographical references and index. Print version record. "This book explores the unique hardware programmability of FPGA (field-programmable gate array)-based embedded systems, using a learning-by-doing approach to introduce the concepts and techniques for embedded SoPC (system on a programmable chip) systems with Verilog. The book contains a large number of practical examples to illustrate and reinforce the hardware and software design concepts and techniques, as well as a complete code listing and experiment problems. The book is designed for upper-level undergraduate and entry-level graduate students in computer engineering, as well as practicing engineers"-- Provided by publisher. "The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures"-- Provided by publisher. Hoboken, N.J. : Wiley, ©2012. ©2012. 2012 Text 1 online resource. http://onlinelibrary.wiley.com/book/10.1002/9781118309728 eng Embedded SoPC design with NIOS II processor and Verilog examples. Embedded SoPC design with NIOS II processor and Verilog examples.